Microchip Technology /ATSAML11D16A /SUPC /BOD33

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Interpret as BOD33

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (ENABLE)ENABLE 0 (HYST)HYST 0 (NONE)ACTION 0 (STDBYCFG)STDBYCFG 0 (RUNSTDBY)RUNSTDBY 0 (ACTCFG)ACTCFG 0 (SEL_VREFDETREF)REFSEL 0 (DIV2)PSEL0LEVEL

REFSEL=SEL_VREFDETREF, ACTION=NONE, PSEL=DIV2

Description

BOD33 Control

Fields

ENABLE

Enable

HYST

Hysteresis Enable

ACTION

Action when Threshold Crossed

0 (NONE): No action

1 (RESET): The BOD33 generates a reset

2 (INT): The BOD33 generates an interrupt

3 (BKUP): The BOD33 puts the device in backup sleep mode if VMON=0

STDBYCFG

Configuration in Standby mode

RUNSTDBY

Run during Standby

ACTCFG

Configuration in Active mode

REFSEL

BOD33 Voltage Reference Selection

0 (SEL_VREFDETREF): Selects VREFDETREF for the BOD33

1 (SEL_ULPVREF): Selects ULPVREF for the BOD33

PSEL

Prescaler Select

0 (DIV2): Divide clock by 2

1 (DIV4): Divide clock by 4

2 (DIV8): Divide clock by 8

3 (DIV16): Divide clock by 16

4 (DIV32): Divide clock by 32

5 (DIV64): Divide clock by 64

6 (DIV128): Divide clock by 128

7 (DIV256): Divide clock by 256

8 (DIV512): Divide clock by 512

9 (DIV1024): Divide clock by 1024

10 (DIV2048): Divide clock by 2048

11 (DIV4096): Divide clock by 4096

12 (DIV8192): Divide clock by 8192

13 (DIV16384): Divide clock by 16384

14 (DIV32768): Divide clock by 32768

15 (DIV65536): Divide clock by 65536

LEVEL

Threshold Level for VDD

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